The size of semiconductor die designs continues to increase. As the size of semiconductor dies increase, in operation, semiconductor circuits employing such dies, normally consume higher amounts of power and current than previous integrated circuits incorporating smaller size dies. High current flow may cause electro-migration problems either in connection with the contacts for connecting an array package to a printed circuit board or within the contacts for connecting a flip chip die to a substrate within an array package (or directly to a printed circuit board in the case of a wafer scale application). To address these issues, one existing solution has been to include multiple contacts on either a die or semiconductor circuit array package for power and ground connections. However, adding inputs and outputs increases the complexity of routing within built up layers both on the package substrate and on the die. Increasing the complexity of routing leads to more expensive packaging.
Larger die designs have also increased the number of inputs and outputs to a semiconductor circuit. As a result, bump, ball, pin, and/or column sizes have decreased in array packages. Because smaller contacts are more likely to break off when a printed circuit board or semiconductor circuit is subjected to mechanical forces (such as when a circuit board is dropped) large die designs with small contacts are also more fragile than existing designs with larger contacts.